Texas A&M University--Kingsville
Department of Electrical Engineering and Computer Science
Principles of CMOS VLSI
ASSIGNMENT 4: TRANSISTOR SIZING
Objective: Understanding the effects of
sizing and "self_loading" on system performance, especially for designs
with a large fan-in.
Simulate the circuit and measure the fall and rise times for minimum
transistors when CL=0.2pF.
Change transistor sizes to achieve maximum delay tp=tpHL=tpLH<3ns
Keep widening the devices until they start showing the "self_loading"